In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The proposed 9T cell utilizes a scheme with separate read and write wordlines; it i...
—This paper deals with the analytical evaluation of the average delay, the packet-loss rate (PLR) and the throughput of a multi-user (MU) wireless system that capitalizes on a cr...
This paper describes a new compression function, MAME designed for hardware-oriented hash functions which can be used in applications reduced hardware requirements. MAME takes a 25...
Hirotaka Yoshida, Dai Watanabe, Katsuyuki Okeya, J...
The design and development of an Interactive Evolutionary Computation (IEC) system needs to take into account the implementation issues found when delivering the system to “Real...