A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Abstract. Reconciling personalization with privacy has been a continuing interest in the user modeling community. In prior work, we proposed a dynamic privacy-enhancing user modeli...
The aim of COMPASS (short for COM mon Positioning Architecture for Several Sensors) is to realize a location infrastructure which can make use of a multitude of different sensors,...
We have implemented a prototype distributed system for managing and accessing a digital library of geospatial imagery over a wide-area network. The system conforms to a subset of ...
Paul D. Coddington, Kenneth A. Hawick, K. E. Kerry...