6001 search results - page 1075 / 1201 » Design of a Network Service Architecture |
157
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DAC
1996
ACM
15 years 10 months ago
1996
ACM
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
150
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JFR
2006
15 years 6 months ago
2006
This paper describes the implementation and testing of Alice, the California Institute of Technology's entry in the 2005 DARPA Grand Challenge. Alice utilizes a highly networ...
163
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VLSISP
1998
15 years 6 months ago
1998
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
163
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FCCM
2009
IEEE
16 years 1 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
174
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ISLPED
2006
ACM
16 years 13 days ago
2006
ACM
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...