Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Abstract. We present a Context Ultra-Sensitive Approach based on two-step Recommender systems (CUSA-2step-Rec). Our approach relies on a committee of profile-specific neural networ...
We propose a single carrier joint frequency domain equalization and interference cancellation (FDE-IC) with diversity combining for different relaying schemes. We consider amplif...
— Environments with varying reward contingencies constitute a challenge to many living creatures. In such conditions, animals capable of adaptation and learning derive an advanta...