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search results - page 87 / 1669
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Design of Neuromorphic Hardwares
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ICCAD
1990
IEEE
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ICCAD 1990
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An Algorithm for Locating Logic Design Errors
15 years 10 months ago
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ir.lib.nthu.edu.tw
Masahiro Tomita, Hong-Hai Jiang, Tamotsu Yamamoto,...
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130
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ASYNC
2006
IEEE
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Slack Matching Asynchronous Designs
15 years 10 months ago
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tima.imag.fr
Peter A. Beerel, Nam-Hoon Kim, Andrew Lines, Mike ...
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107
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DATE
2004
IEEE
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DATE 2004
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Improving Design and Verification Productivity with VHDL-200x
15 years 10 months ago
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www.cs.york.ac.uk
Stephen Bailey, Erich Marschner, Jayaram Bhasker, ...
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ATS
2001
IEEE
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ATS 2001
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An Improved AVPG Algorithm for SoC Design Verification Using Port Order Fault Model
15 years 10 months ago
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nthucad.cs.nthu.edu.tw
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
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142
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IMS
2000
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IMS 2000
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Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips
15 years 10 months ago
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masc.soe.ucsc.edu
Michael C. Huang, Jose Renau, Seung-Moon Yoo, Jose...
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