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» Design of Neuromorphic Hardwares
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EUROCRYPT
2007
Springer
16 years 16 days ago
Non-wafer-Scale Sieving Hardware for the NFS: Another Attempt to Cope with 1024-Bit
Significant progress in the design of special purpose hardware for supporting the Number Field Sieve (NFS) has been made. From a practical cryptanalytic point of view, however, no...
Willi Geiselmann, Rainer Steinwandt
CODES
2004
IEEE
15 years 10 months ago
Facilitating reuse in hardware models with enhanced type inference
High-level hardware modeling is an essential, yet time-consuming, part of system design. However, effective component-based reuse in hardware modeling languages can reduce model c...
Manish Vachharajani, Neil Vachharajani, Sharad Mal...
GECCO
2003
Springer
170views Optimization» more  GECCO 2003»
15 years 11 months ago
Hardware Evolution of Analog Speed Controllers for a DC Motor
Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions...
David A. Gwaltney, Michael I. Ferguson
FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
16 years 12 days ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
TVLSI
2008
140views more  TVLSI 2008»
15 years 6 months ago
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
Jorge Campos, Hussain Al-Asaad