8345 search results - page 75 / 1669 » Design of Neuromorphic Hardwares |
149
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EURODAC
1994
IEEE
15 years 10 months ago
1994
IEEE
In this paper we introduce a method to partition UNITY system speci cations into software and hardware parts. This method considers di erent design possibilities and de nes cost f...
170
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ICECCS
2009
IEEE
15 years 4 months ago
2009
IEEE
In hard real-time systems such as avionics, computer board level designs are typically customized to meet specific reliability and real time requirements. This paper focuses on co...
153
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ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect...
134
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
Scan-based silicon debug is a technique that can be used to help find design errors in prototype silicon more quickly. One part of this technique involves the inclusion of breakpo...
165
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FDL
2005
IEEE
15 years 12 months ago
2005
IEEE
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...