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    ACSD
    2007
    IEEE
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    Using CTL formulae as component abstraction in a design and verification flow
    16 years 19 days ago
    Using CTL formulae as component abstraction in a design and verification flow
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    Cécile Braunstein, Emmanuelle Encrenaz
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    DATE
    2007
    IEEE
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    Design challenges at 65nm and beyond
    16 years 19 days ago
    Design challenges at 65nm and beyond
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    Andrew B. Kahng
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    DATE
    2007
    IEEE
    74views Hardware» more  DATE 2007»
    Modeling and simulation alternatives for the design of networked embedded systems
    16 years 19 days ago
    Modeling and simulation alternatives for the design of networked embedded systems
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    E. Alessio, Franco Fummi, Davide Quaglia, Maura Tu...
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    DATE
    2007
    IEEE
    108views Hardware» more  DATE 2007»
    A symbolic methodology for the verification of analog and mixed signal designs
    16 years 19 days ago
    A symbolic methodology for the verification of analog and mixed signal designs
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    Ghiath Al Sammane, Mohamed H. Zaki, Sofiène...
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    DATE
    2007
    IEEE
    80views Hardware» more  DATE 2007»
    Incremental ABV for functional validation of TL-to-RTL design refinement
    16 years 19 days ago
    Incremental ABV for functional validation of TL-to-RTL design refinement
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    Nicola Bombieri, Franco Fummi, Graziano Pravadelli
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