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Design of Neuromorphic Hardwares
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2003
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Design and Performance of Compressed Interconnects for High Performance Servers
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Krishna Kant, Ravishankar K. Iyer
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2002
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A Standard-Cell Placement Tool for Designs with High Row Utilization
16 years 3 months ago
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Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh
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2000
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Efficient Design Error Correction of Digital Circuits
16 years 3 months ago
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thesis.lib.ncu.edu.tw
Dirk W. Hoffmann, Thomas Kropf
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ICCAD
2006
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Studying a GALS FPGA architecture using a parameterized automatic design flow
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ÊÓÙØ Ò Ð Ý× ÓÑ Ò Ø ÓØ Ö Ð Ý× Ò ÙÖÖ ÒØ È ¹ × Ò׺ Ï Ú ÔÖÓÔÓ× ÒÓÚ Ð ÐÓ ÐÐÝ ×ÝÒ ÖÓÒÓÙ× ÄÓ ÐÐÝ ËÝÒ ÖÓÒÓÙ× ´ ÄË...
Xin Jia, Ranga Vemuri
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Design and integration methods for a multi-threaded dual core 65nm Xeon® processor
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Raj Varada, Mysore Sriram, Kris Chou, James Guzzo
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