8345 search results - page 1604 / 1669 » Design of Neuromorphic Hardwares |
150
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FPGA
2003
ACM
15 years 11 months ago
2003
ACM
We present a pipelining-aware router for FPGAs. The problem of routing pipelined signals is different from the conventional FPGA routing problem. For example, the two terminal N-D...
143
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GLVLSI
2010
IEEE
15 years 11 months ago
2010
IEEE
Next generation industrial embedded platforms require the development of complex power and thermal management solutions. Indeed, an increasingly fine and intrusive thermal contro...
196
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CODES
2009
IEEE
15 years 11 months ago
2009
IEEE
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
209
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SIGADA
2001
Springer
15 years 10 months ago
2001
Springer
Statement and AbstractProblem Statement and AbstractProblem Statement and AbstractProblem Statement and Abstract The U.S. Navy currently bases the majority of our contact managemen...
159
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CASES
2000
ACM
15 years 10 months ago
2000
ACM
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...