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» Design of Neuromorphic Hardwares
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MSS
2005
IEEE
182views Hardware» more  MSS 2005»
15 years 11 months ago
Evaluation of Advanced TCP Stacks in the iSCSI Environment using Simulation Model
Enterprise storage demands have overwhelmed traditional storage mechanisms and have led to the development of Storage Area Networks (SANs). This has resulted in the design of SCSI...
Girish Motwani, K. Gopinath
VISUALIZATION
2005
IEEE
15 years 11 months ago
Build-by-Number: Rearranging the Real World to Visualize Novel Architectural Spaces
We present Build-by-Number, a technique for quickly designing architectural structures that can be rendered photorealistically at interactive rates. We combine image-based capturi...
Daniel R. Bekins, Daniel G. Aliaga
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
15 years 11 months ago
Region-level approximate computation reuse for power reduction in multimedia applications
ABSTRACT Motivated by data value locality and quality tolerance present in multimedia applications, we propose a new micro-architecture, Region-level Approximate Computation Buffer...
Xueqi Cheng, Michael S. Hsiao
ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
15 years 11 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang
ISLPED
2005
ACM
98views Hardware» more  ISLPED 2005»
15 years 11 months ago
Synonymous address compaction for energy reduction in data TLB
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, M...
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