8345 search results - page 1591 / 1669 » Design of Neuromorphic Hardwares |
167
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CODES
2008
IEEE
16 years 20 days ago
2008
IEEE
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
188
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HPDC
2008
IEEE
16 years 20 days ago
2008
IEEE
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
175
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IEEEPACT
2008
IEEE
16 years 18 days ago
2008
IEEE
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
171
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CODES
2007
IEEE
16 years 16 days ago
2007
IEEE
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
160
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CODES
2007
IEEE
16 years 16 days ago
2007
IEEE
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...