8345 search results - page 1556 / 1669 » Design of Neuromorphic Hardwares |
150
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DELTA
2004
IEEE
15 years 10 months ago
2004
IEEE
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
148
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EEE
2004
IEEE
15 years 10 months ago
2004
IEEE
Online (Web-based) examination is an effective solution for mass education evaluation. However, due to the incomplete of network security, students can communicate with each other...
162
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FDL
2004
IEEE
15 years 10 months ago
2004
IEEE
Model-driven approaches proved themselves not suited yet to support real-time software development. Even if they have the ability of capturing adequately both functional and non-f...
180
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CODES
2006
IEEE
15 years 10 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
164
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DAC
2006
ACM
15 years 10 months ago
2006
ACM
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...