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» Design of Neuromorphic Hardwares
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ARITH
1993
IEEE
15 years 10 months ago
An accurate LNS arithmetic unit using interleaved memory function interpolator
This paper describes a logarithmic number system (LNS) arithmetic unit using a new methodfor polynomial interpolation in hardware. The use of an interleaved memory reduces storage...
David M. Lewis
HPDC
1993
IEEE
15 years 10 months ago
Supporting Heterogeneity and Distribution in the Numerical Propulsion System
The Numerical Propulsion System Simulation (NPSS) project has been initiated by NASA to explore the use of computer simulation in the development of new aircraft propulsion techno...
Patrick T. Homer, Richard D. Schlichting
HICSS
1994
IEEE
152views Biometrics» more  HICSS 1994»
15 years 10 months ago
Simple COMA Node Implementations
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
Erik Hagersten, Ashley Saulsbury, Anders Landin
CCS
1994
ACM
15 years 10 months ago
Protocol Failure in the Escrowed Encryption Standard
The Escrowed Encryption Standard (EES) defines a US Government family of cryptographic processors, popularly known as "Clipper" chips, intended to protect unclassified g...
Matt Blaze
ECAIW
1994
Springer
15 years 10 months ago
Agent Theories, Architectures, and Languages: A Survey
The concept of an agent has recently become important in Artificial Intelligence (AI), and its relatively youthful subfield, Distributed AI (DAI). Our aim in this paper is to poin...
Michael Wooldridge, Nicholas R. Jennings
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