Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
This paper presents a verification technique for functional comparison of large combinational circuits using a novel combination of known approaches. The idea is based on a tight...
This paper describes the application of binary and multivalued SPFD-based wire removal techniques for circuit implementations utilizing networks of PLAs. It has been shown that a ...
Subarnarekha Sinha, Sunil P. Khatri, Robert K. Bra...
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
We propose a novel work partitioning technique, Image Layer Decomposition (ILD), designed specifically to support distributed real-time rendering on commodity clusters. ILD has s...