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FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
15 years 10 months ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
ICCD
2000
IEEE
120views Hardware» more  ICCD 2000»
15 years 10 months ago
Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation
This paper presents a verification technique for functional comparison of large combinational circuits using a novel combination of known approaches. The idea is based on a tight...
Viresh Paruthi, Andreas Kuehlmann
ICCD
2000
IEEE
87views Hardware» more  ICCD 2000»
15 years 10 months ago
Binary and Multi-Valued SPFD-Based Wire Removal in PLA Networks
This paper describes the application of binary and multivalued SPFD-based wire removal techniques for circuit implementations utilizing networks of PLAs. It has been shown that a ...
Subarnarekha Sinha, Sunil P. Khatri, Robert K. Bra...
IPPS
2000
IEEE
15 years 10 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
IPPS
2000
IEEE
15 years 10 months ago
Image Layer Decomposition for Distributed Real-Time Rendering on Clusters
We propose a novel work partitioning technique, Image Layer Decomposition (ILD), designed specifically to support distributed real-time rendering on commodity clusters. ILD has s...
Thu D. Nguyen, John Zahorjan
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