Sciweavers

8345 search results - page 1536 / 1669
» Design of Neuromorphic Hardwares
Sort
View
IPPS
2003
IEEE
15 years 11 months ago
Some Modular Adders and Multipliers for Field Programmable Gate Arrays
This paper is devoted to the study of number representations and algorithms leading to efficient implementations of modular adders and multipliers on recent Field Programmable Ar...
Jean-Luc Beuchat
IPPS
2003
IEEE
15 years 11 months ago
Performance Monitoring and Evaluation of a UPC Implementation on a NUMA Architecture
UPC is an explicit parallel extension of ANSI C, which has been gaining rising attention from vendors and users. In this work, we consider the low-level monitoring and experimenta...
François Cantonnet, Yiyi Yao, Smita Annared...
IPPS
2003
IEEE
15 years 11 months ago
An Executable Analytical Performance Evaluation Approach for Early Performance Prediction
Percolation has recently been proposed as a key component of an advanced program execution model for future generation high-end machines featuring adaptive data/code transformatio...
Adeline Jacquet, Vincent Janot, Clement Leung, Gua...
ISCAS
2003
IEEE
134views Hardware» more  ISCAS 2003»
15 years 11 months ago
A hybrid system for automatic fingerprint identification
A hybrid fingerprint identification system is presented in this paper. The system consists of several steps: fingerprint enhancement, minutiae extraction, texture feature extracti...
Sanpachai Huvanandana, Settapong Malisuwan, Jakkap...
ISCAS
2003
IEEE
148views Hardware» more  ISCAS 2003»
15 years 11 months ago
Hybrid neural network architecture for age identification of ancient Kannada scripts
Wide research has been carried out and is still taking place in the field of character recognition of handwritten English characters. Recognizing English characters is much simple...
Harish K. Kashyap, Bansilal, P. Arun Koushik
« Prev « First page 1536 / 1669 Last » Next »