Sciweavers

8345 search results - page 1533 / 1669
» Design of Neuromorphic Hardwares
Sort
View
SAT
2004
Springer
97views Hardware» more  SAT 2004»
15 years 11 months ago
Using Lower-Bound Estimates in SAT-Based Pseudo-Boolean Optimization
Linear Pseudo-Boolean constraints offer a much more compact formalism to express significant boolean problems in several areas, ranging from Artificial Intelligence to Electroni...
Vasco M. Manquinho, João P. Marques Silva
DFT
2003
IEEE
145views VLSI» more  DFT 2003»
15 years 11 months ago
System-Level Analysis of Fault Effects in an Automotive Environment
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
Fulvio Corno, S. Tosato, P. Gabrielli
DFT
2003
IEEE
100views VLSI» more  DFT 2003»
15 years 11 months ago
Scan-Based BIST Diagnosis Using an Embedded Processor
For system-on-chip designs that contain an embedded processor, this paper present a software based diagnosis scheme that can make use of the processor to aid in diagnosis in a sca...
Kedarnath J. Balakrishnan, Nur A. Touba
DFT
2003
IEEE
132views VLSI» more  DFT 2003»
15 years 11 months ago
Level-Hybrid Optoelectronic TESH Interconnection Network
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
Vijay K. Jain, Glenn H. Chapman
DSN
2003
IEEE
15 years 11 months ago
Integrating Recovery Strategies into a Primary Substation Automation System
The DepAuDE architecture provides middleware to integrate fault tolerance support into distributed embedded automation applications. It allows error recovery to be expressed in te...
Geert Deconinck, Vincenzo De Florio, Ronnie Belman...
« Prev « First page 1533 / 1669 Last » Next »