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FPGA
1995
ACM
118views FPGA» more  FPGA 1995»
15 years 10 months ago
An SBus Monitor Board
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask
ICCAD
1995
IEEE
134views Hardware» more  ICCAD 1995»
15 years 10 months ago
A delay model for logic synthesis of continuously-sized networks
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...
ISCA
1995
IEEE
109views Hardware» more  ISCA 1995»
15 years 10 months ago
Next Cache Line and Set Prediction
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald
SIGMETRICS
1997
ACM
112views Hardware» more  SIGMETRICS 1997»
15 years 10 months ago
Group-Guaranteed Channel Capacity in Multimedia Storage Servers
One of the open questions in the design of multimedia storage servers is in what order to serve incoming requests. Given the capability provided by the disk layout and scheduling ...
Athanassios Tsiolis, Mary K. Vernon
SIGMETRICS
1995
ACM
144views Hardware» more  SIGMETRICS 1995»
15 years 10 months ago
On Characterizing Bandwidth Requirements of Parallel Applications
Synthesizing architectural requirements from an application viewpoint can help in making important architectural design decisions towards building large scale parallel machines. I...
Anand Sivasubramaniam, Aman Singla, Umakishore Ram...
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