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» Design of Neuromorphic Hardwares
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ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
16 years 19 days ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
SASN
2006
ACM
16 years 18 days ago
Attack-resilient hierarchical data aggregation in sensor networks
In a large sensor network, in-network data aggregation, i.e., combining partial results at intermediate nodes during message routing, significantly reduces the amount of communic...
Sankardas Roy, Sanjeev Setia, Sushil Jajodia
SPAA
2006
ACM
16 years 18 days ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
AICCSA
2005
IEEE
168views Hardware» more  AICCSA 2005»
16 years 9 days ago
A dynamic range resource reservation protocol for QoS support in wireless networks
— Mobile ad hoc networks (MANETs) provide a powerful and dynamic platform to enable mobile computers to establish communications without an existing infrastructure. In order to p...
Imad Jawhar, Jie Wu
CODES
2005
IEEE
16 years 8 days ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
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