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» Design of Neuromorphic Hardwares
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PPOPP
2009
ACM
16 years 7 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
CHI
2007
ACM
16 years 7 months ago
iStuff mobile: rapidly prototyping new mobile phone interfaces for ubiquitous computing
iStuff Mobile is the first rapid prototyping framework that helps explore new sensor-based interfaces with existing mobile phones. It focuses on sensor-enhanced physical interface...
Rafael Ballagas, Faraz Memon, Rene Reiners, Jan O....
ASPLOS
2010
ACM
16 years 1 months ago
ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications
Instruction-grain lifeguards monitor the events of a running application at the level of individual instructions in order to identify and help mitigate application bugs and securi...
Evangelos Vlachos, Michelle L. Goodstein, Michael ...
DAC
2009
ACM
16 years 1 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
172
Voted
SIGCOMM
2009
ACM
16 years 1 months ago
VL2: a scalable and flexible data center network
To be agile and cost effective, data centers should allow dynamic resource allocation across large server pools. In particular, the data center network should enable any server to...
Albert G. Greenberg, James R. Hamilton, Navendu Ja...
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