8345 search results - page 1391 / 1669 » Design of Neuromorphic Hardwares |
159
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FPGA
2007
ACM
16 years 26 days ago
2007
ACM
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
176
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GECCO
2007
Springer
16 years 26 days ago
2007
Springer
This paper describes the application of evolutionary search to the problem of Flash memory wear-out. The operating parameters of Flash memory are notoriously difficult to determin...
187
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IESS
2007
Springer
16 years 26 days ago
2007
Springer
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
155
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DATE
2006
IEEE
16 years 23 days ago
2006
IEEE
Consumer electronics products, such as high-end (digital) TVs, contain complex systems on chip (SOC) that offer high computational performance at low cost. Traditionally, these SO...
177
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DATE
2006
IEEE
16 years 23 days ago
2006
IEEE
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...