8345 search results - page 1389 / 1669 » Design of Neuromorphic Hardwares |
167
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ISQED
2008
IEEE
16 years 1 months ago
2008
IEEE
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
231
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
200
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
169
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
Scaling of CMOS feature size has long been a source of dramatic performance gains. However, the reduction in voltage levels has not been able to match this rate of scaling, leadin...
204
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CODES
2007
IEEE
16 years 1 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...