8345 search results - page 1382 / 1669 » Design of Neuromorphic Hardwares |
175
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
187
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
225
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MOBISYS
2006
ACM
16 years 6 months ago
2006
ACM
There is a fair amount of evidence that mesh (static multihop wireless) networks are gaining popularity, both in the academic literature and in the commercial space. Nonetheless, ...
185
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
194
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...