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MICRO
2002
IEEE
143views Hardware» more  MICRO 2002»
15 years 11 months ago
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
Enric Gibert, F. Jesús Sánchez, Anto...
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 11 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
SIGGRAPH
2010
ACM
15 years 11 months ago
The Frankencamera: an experimental platform for computational photography
Although there has been much interest in computational photography within the research and photography communities, progress has been hampered by the lack of a portable, programm...
Andrew Adams, Eino-Ville Talvala, Sung Hee Park, D...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 11 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
153
Voted
HICSS
2010
IEEE
166views Biometrics» more  HICSS 2010»
15 years 11 months ago
VrtProf: Vertical Profiling for System Virtualization
As data centers and end users become increasingly reliant on virtualization technology, more efficient and accurate methods of profiling such systems are needed. However, under vir...
Hussam Mousa, Kshitij Doshi, Timothy Sherwood, ElM...
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