8345 search results - page 1274 / 1669 » Design of Neuromorphic Hardwares |
140
click to vote
ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
— We describe the design of a contact imager for applications in lab-on-a-chip systems, such as sample preparation and manipulation and monitoring of cells. This is a challenging...
144
click to vote
ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
- In this paper, we propose a novel rate allocation method for compound image coding using Quality-biased Rate-Distortion Optimization (QRDO) technique to enhance visual quality. T...
150
click to vote
ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
— The implementation of a high-performance network-on-chip (NoC) requires an efficient design for the network interface unit (NIU) that connects the switched network to the IP c...
182
click to vote
ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
Extremely low power consumption is the critical constraint for designing implantable neural decoders that inter- Desired face directly with the nervous system. Typically a system w...
151
click to vote
ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
Abstract— This paper investigates the implementation of highradix multiplication based on the Electron Counting (EC) paradigm in Single Electron Tunneling (SET) technology. First...