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ISCAS
2006
IEEE
103views Hardware» more  ISCAS 2006»
16 years 27 days ago
A low-power geometric mapping co-processor for high-speed graphics application
Abstract— In this article we present a novel design of a lowpower geometric mapping co-processor that can be used for high-performance graphics system. The processor can carry ou...
S. Leeke, L. Maharatna
ISCAS
2006
IEEE
107views Hardware» more  ISCAS 2006»
16 years 27 days ago
A CMOS image sensor for low light applications
— We describe and analyze a novel CMOS pixel for high speed, low light imaging applications. The new pixel achieves lower dark current and noise and increased gain in comparison ...
Honghao Ji, Pamela Abshire
ISCAS
2006
IEEE
105views Hardware» more  ISCAS 2006»
16 years 27 days ago
A new Spice-oriented frequency-domain optimization technique
— There are many kinds of optimization techniques for designing high-performance RF circuits. In this paper, we propose a new frequency-domain Spice-oriented optimization algorit...
Masayoshi Oda, Yoshihiro Yamagami, Yoshifumi Nishi...
ISCAS
2006
IEEE
85views Hardware» more  ISCAS 2006»
16 years 27 days ago
Digital phase-shift modulation for an isolation buffer in silicon-on-sapphire CMOS
— We designed and fabricated a 4-channels digital isolation amplifier in a 0.5µm Silicon-on-Sapphire technology. The isolation device was fabricated on a single die, taking adv...
Eugenio Culurciello, Philippe O. Pouliquen, Andrea...
ISCAS
2006
IEEE
99views Hardware» more  ISCAS 2006»
16 years 27 days ago
High-rate quasi-cyclic LDPC codes for magnetic recording channel with low error floor
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...
Hao Zhong, Tong Zhang, Erich F. Haratsch
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