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ISCAS
2005
IEEE
173views Hardware» more  ISCAS 2005»
16 years 22 hour ago
CMOS contact imager for monitoring cultured cells
— There is a growing interest in developing low cost, low power, highly integrated biosensor systems to characterize individual cells for applications such as cell analysis, drug...
Honghao Ji, Pamela Abshire, M. Urdaneta, Elisabeth...
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
16 years 5 hour ago
Fast configurable-cache tuning with a unified second-level cache
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
CASES
2003
ACM
15 years 11 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 10 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
PACS
2000
Springer
83views Hardware» more  PACS 2000»
15 years 10 months ago
A Comparison of Two Architectural Power Models
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
Soraya Ghiasi, Dirk Grunwald