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FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
16 years 16 days ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
DAC
2009
ACM
15 years 10 months ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen
SC
2009
ACM
16 years 1 months ago
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...
LCTRTS
2007
Springer
16 years 19 days ago
Generalizing parametric timing analysis
In the design of real-time and embedded systems, it is important to establish a bound on the worst-case execution time (WCET) of programs to assure via schedulability analysis tha...
Joel Coffman, Christopher A. Healy, Frank Mueller,...
MOBISYS
2008
ACM
16 years 6 months ago
Brimon: a sensor network system for railway bridge monitoring
: Railway systems are critical in many regions, and can consist of several tens of thousands of bridges, being used over several decades. It is critical to have a system to monitor...
Kameswari Chebrolu, Bhaskaran Raman, Nilesh Mishra...