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ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
16 years 3 months ago
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
Anirudh Devgan, Chandramouli V. Kashyap
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 11 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
15 years 3 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
ISLPED
2003
ACM
94views Hardware» more  ISLPED 2003»
15 years 11 months ago
Evolution of low power electronics and its future applications
Low power technology is impacting our society by creating the newly emerging digital consumer market, which leads to the nomadic life-style. In this paper, historical review of th...
Tsugio Makimoto, Yoshio Sakai
ISCAS
2007
IEEE
104views Hardware» more  ISCAS 2007»
16 years 10 days ago
A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback
Abstract—This paper presents the design of a two-stage pseudodifferential operational transconductance amplifier (OTA). The circuit was designed in a standard 0.18 µm, 0.5 V VT ...
Michael Trakimas, Sameer R. Sonkusale