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» Design of Digital Circuits on the Basis of Hardware Template...
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ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
15 years 10 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
16 years 3 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
ICCD
1996
IEEE
108views Hardware» more  ICCD 1996»
15 years 10 months ago
Module Generators for a Regular Analog Layout
In general, automatic layout composition techniques based on pre-designed devices facilitate the production of small IC numbers by prefabricating their basic structures. They also...
J. Kampe, C. Wisser, G. Scarbata
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
15 years 10 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...
DATE
1998
IEEE
114views Hardware» more  DATE 1998»
15 years 10 months ago
Design Of Future Systems
Near-future linac projects put yet unreached requirements on the LLRF control hardware in both performance and manageability. Meeting their field stability targets requires a clea...
Ian Page