305 search results - page 39 / 61 » Design of Digital Circuits on the Basis of Hardware Template... |
141
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ICCAD
2004
IEEE
16 years 3 months ago
2004
IEEE
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
152
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ISCAS
2007
IEEE
16 years 11 days ago
2007
IEEE
— The work presented in this paper is about the design of current-controlled oscillators (ICO). Two ICOs are proposed. Aiming at reducing the duration of the short-circuit curren...
144
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ASYNC
1998
IEEE
15 years 10 months ago
1998
IEEE
Analogue to digital (A-D) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time fo...
164
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
162
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TVLSI
2010
15 years 23 days ago
2010
It has been recently demonstrated that digital signal processing systems may possibly leverage unconventional voltage overscaling (VOS) to reduce energy consumption while maintaini...