305 search results - page 38 / 61 » Design of Digital Circuits on the Basis of Hardware Template... |
171
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
166
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
Logic synthesis has made impressive progress in the last decade and has pervaded digital design replacing almost universally manual techniques. A remarkable exception is computer ...
154
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DATE
2005
IEEE
15 years 11 months ago
2005
IEEE
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
144
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EH
2004
IEEE
15 years 9 months ago
2004
IEEE
The work presented here tackles the problem of designing a unipolar 6-bit digital-to-analog converter (DAC) with a voltage mode output by hardware evolution. Thereby a Field Progr...
186
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ISPD
2005
ACM
15 years 11 months ago
2005
ACM
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...