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RSP
2003
IEEE
16 years 2 days ago
Verification of Timing Properties in Rapid System Prototyping
This paper addresses the need for systematic verification of timing properties of real-time prototypes, which consist of timing constraints that must be satisfied at any given tim...
Doron Drusinsky, Man-tak Shing
ISSS
2002
IEEE
106views Hardware» more  ISSS 2002»
15 years 11 months ago
Modeling Assembly Instruction Timing in Superscalar Architectures
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
William Fornaciari, Vito Trianni, Carlo Brandolese...
APLAS
2001
ACM
15 years 10 months ago
Estimating Exception-Induced Control Flow for Java
Exception analyses so far cannot provide information on the propagation of thrown exceptions, which is necessary to construct interprocedural control flow graph, visualize exceptio...
Byeong-Mo Chang, Jang-Wu Jo
FORTE
2011
14 years 10 months ago
Analyzing BGP Instances in Maude
Analyzing Border Gateway Protocol (BGP) instances is a crucial step in the design and implementation of safe BGP systems. Today, the analysis is a manual and tedious process. Resea...
Anduo Wang, Carolyn L. Talcott, Limin Jia, Boon Th...
IUI
2005
ACM
16 years 11 days ago
Interfaces for networked media exploration and collaborative annotation
In this paper, we present our efforts towards creating interfaces for networked media exploration and collaborative annotation. The problem is important since online social networ...
Preetha Appan, Bageshree Shevade, Hari Sundaram, D...