As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for VLSI design. This paper,...
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jan...
Abstract. In this paper, we propose a general framework for designing fully polynomial time approximation schemes for combinatorial optimization problems, in which more than one ob...
Abstract--In this paper, the authors examine the problem of designing nominal manipulator Jacobians that are optimally fault tolerant to one or more joint failures. Optimality is d...
Rodney G. Roberts, Hyun Geun Yu, Anthony A. Maciej...
This paper presents a system level design methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. These heterogeneous systems,...