9477 search results - page 405 / 1896 » Design is as Easy as Optimization |
183
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TCAD
2010
15 years 1 months ago
2010
Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of f...
147
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
This paper presents a set of comprehensive techniques for the intratask voltage scheduling problem to reduce energy consumption in hard real-time tasks of embedded systems. Based ...
156
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
This paper presents an optimal procrastinating voltage scheduling (OP-DVS) for hard real-time systems using stochastic workload information. Algorithms are presented for both sing...
149
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ICCD
2006
IEEE
16 years 3 months ago
2006
IEEE
-- Power-gating is a technique for efficiently reducing leakage power by shutting off the idle blocks. However, the presence of power-gating may also introduce negative effects on ...
192
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DATE
2006
IEEE
16 years 28 days ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...