9477 search results - page 388 / 1896 » Design is as Easy as Optimization |
180
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ANCS
2007
ACM
15 years 11 months ago
2007
ACM
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
176
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DAC
2010
ACM
15 years 10 months ago
2010
ACM
In this paper we summarize recent developments in compact dynamical modeling for both linear and nonlinear systems arising in analog applications. These techniques include methods...
182
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CIT
2006
Springer
15 years 10 months ago
2006
Springer
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard. A major enhancement to the standard is the addition of decimal format, thus the design of BCD arithmetic...
187
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EUC
2006
Springer
15 years 10 months ago
2006
Springer
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
195
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EURODAC
1995
IEEE
15 years 10 months ago
1995
IEEE
This paper is focused on reducing the design time in a CAD framework environment by the optimal use of resources. A user-transparent load distribution system (Framework based LOad...