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ICC
2000
IEEE
15 years 11 months ago
On Design of Interleavers with Practical Size for Turbo Codes
- In this paper, we propose a new method to design an interleaver with practical size for turbo codes. In order to construct an optimal interleaver, we first set up the following d...
Duanyi Wang, Hisashi Kobayashi
DAWAK
1999
Springer
15 years 11 months ago
Heuristic Algorithms for Designing a Data Warehouse with SPJ Views
A Data Warehouse DW can be abstractly seen as a set of materialized views de ned over relations that are stored in distributed heterogeneous databases. The selection of views for...
Spyros Ligoudistianos, Timos K. Sellis, Dimitri Th...
FPGA
1998
ACM
140views FPGA» more  FPGA 1998»
15 years 11 months ago
More Wires and Fewer LUTs: A Design Methodology for FPGAs
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
Atsushi Takahara, Toshiaki Miyazaki, Takahiro Muro...
DAC
1996
ACM
15 years 11 months ago
A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
Nguyen-Ngoc Bình, Masaharu Imai, Akichika S...
DAC
1996
ACM
15 years 11 months ago
Use of Sensitivities and Generalized Substrate Models in Mixed-Signal IC Design
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
Paolo Miliozzi, Iasson Vassiliou, Edoardo Charbon,...