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204
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ISCA
2005
IEEE
16 years 12 days ago
2005
IEEE
Minimizing latency and maximizing throughput are important goals in the design of routing algorithms for interconnection networks. Ideally, we would like a routing algorithm to (a...
205
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DAC
1997
ACM
15 years 11 months ago
1997
ACM
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
211
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RTS
2006
15 years 6 months ago
2006
Abstract The increasing complexity of heterogeneous systems-on-chip, SoC, and distributed embedded systems makes system optimization and exploration a challenging task. Ideally, a ...
190
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CEC
2009
IEEE
16 years 1 months ago
2009
IEEE
— In this paper, the performance assessment of the hybrid Archive-based Micro Genetic Algorithm (AMGA) on a set of bound-constrained synthetic test problems is reported. The hybr...
180
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ISLPED
2004
ACM
16 years 7 days ago
2004
ACM
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architectur...