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ISQED
2003
IEEE
121views Hardware» more  ISQED 2003»
16 years 2 days ago
Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization
— The design of an efficient monolithic buck converter is presented in this paper. A low swing MOSFET gate drive technique is proposed that improves the efficiency characteristic...
Volkan Kursun, Siva Narendra, Vivek De, Eby G. Fri...
ICCD
2000
IEEE
94views Hardware» more  ICCD 2000»
15 years 11 months ago
Synthesis and Optimization of Interface Hardware between IP's Operating at Different Clock Frequencies
In system-on-a-chip design, interfacing of Intellectual Property(IP) blocks is one of the most important issues. Since most IP’s are provided by different vendors, they have dif...
Bong-Il Park, Hoon Choi, In-Cheol Park, Chong-Min ...
FPL
2000
Springer
130views Hardware» more  FPL 2000»
15 years 10 months ago
Area-Optimized Technology Mapping for Hybrid FPGAs
As integration levels in FPGA devices have increased over the past decade, the structure of programmable logic resources has become more diversified. Recently, Altera Corporation h...
Srini Krishnamoorthy, Sriram Swaminathan, Russell ...
CDC
2009
IEEE
180views Control Systems» more  CDC 2009»
15 years 10 months ago
Robustness analysis for Least Squares kernel based regression: an optimization approach
—In kernel based regression techniques (such as Support Vector Machines or Least Squares Support Vector Machines) it is hard to analyze the influence of perturbed inputs on the ...
Tillmann Falck, Johan A. K. Suykens, Bart De Moor
DAC
2005
ACM
15 years 8 months ago
Template-driven parasitic-aware optimization of analog integrated circuit layouts
Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J...