Sciweavers

9477 search results - page 348 / 1896
» Design is as Easy as Optimization
Sort
View
VLSID
2009
IEEE
223views VLSI» more  VLSID 2009»
16 years 7 months ago
Novel MOS Decoupling Capacitor Optimization Technique for Nanotechnologies
Designing MOS decoupling capacitors (DECAPs) in nanotechnologies provides many challenges due to the existing trade-offs among transient time response behavior, area, and gate lea...
Bardia Bozorgzadeh, Ali Afzali-Kusha
CEC
2009
IEEE
16 years 1 months ago
Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming
— Polymorphic digital circuits contain ordinary and polymorphic gates. In the past, Cartesian Genetic Programming (CGP) has been applied to synthesize polymorphic circuits at the...
Zbysek Gajda, Lukás Sekanina
INFOCOM
2007
IEEE
16 years 1 months ago
On the Optimality and Interconnection of Valiant Load-Balancing Networks
— The Valiant Load-Balancing (VLB) design has been proposed for a backbone network architecture that can efficiently provide predictable performance under changing traffic matr...
Moshe Babaioff, John Chuang
ISCAS
2006
IEEE
92views Hardware» more  ISCAS 2006»
16 years 24 days ago
The optimal MAC layer for low-power UWB is non-coordinated
— We consider the design of the MAC layer for low power, low data-rate, impulse-radio ultra-wide band (IRUWB) networks. In such networks, the primary concern is energy consumptio...
Ruben Merz, Alaeddine El Fawal, Jean-Yves Le Boude...
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
16 years 12 days ago
Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization
— This paper suggests a methodology to decrease the power of a static CMOS standard cell design at layout level by focusing on switched capacitance. The term switched is the key:...
Paul Zuber, Armin Windschiegl, Raúl Medina ...