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187
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DATE
1999
IEEE
1999
IEEE
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
15 years 11 months ago
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
148
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LREC
2010
15 years 8 months ago
2010
Building a comprehensive pronunciation lexicon is a crucial element in the success of any speech recognition engine. The first stage of lexicon design involves the compilation of ...
145
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
We describe a time-domain procedure for designing the synthesis filters of perfect-reconstruction oversampled filter banks. A condition matrix is derived from the basic magnitud...
123
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ICCD
2007
IEEE
16 years 1 months ago
2007
IEEE
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
179
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ICCAD
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper addresses an optimal technique for throughput optimization of general non-linear data flow computations using a set of transformations. Throughput is widely recognized ...