Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
— In this paper, we present a new interconnect delay model called Fitted Elmore delay (FED). FED is generated by approximating Hspice delay data using a curve fitting technique....
Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Ch...
Abstract—On-chip power density and temperature are rising exponentially with decreasing feature sizes. This alarming trend calls for temperature management at every level of syst...
Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we sug...
M. Haykel Ben Jamaa, Kirsten E. Moselund, David At...
Abstract – The storage requirements in data-intensive signal processing systems (including applications in video and image processing, artificial vision, medical imaging, real-t...