Sciweavers

2027 search results - page 95 / 406
» Design in evaluation: reflections on designing for children'...
Sort
View
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
16 years 3 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok
ANSS
2002
IEEE
15 years 11 months ago
Evaluating the Performance of Photonic Interconnection Networks
This paper describes the design and use of the Interconnection Network Simulator (ICNS) framework. ICNS is a modular, object-oriented simulation system that has been developed to ...
Roger D. Chamberlain, Ch'ng Shi Baw, Mark A. Frank...
CAISE
2003
Springer
15 years 11 months ago
Evaluation of the SRA Tool Using Data Mining Techniques
This paper describes a validation approach of a socio-technical design support system using data mining techniques. Bayesian Belief Networks (BBN) are used to assess human error an...
Andreas Gregoriades, Alistair G. Sutcliffe, Harala...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
16 years 28 days ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
VLSID
2004
IEEE
117views VLSI» more  VLSID 2004»
16 years 6 months ago
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
Gethin Norman, David Parker, Marta Z. Kwiatkowska,...