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TCOM
2008
151views more  TCOM 2008»
15 years 5 months ago
Design of regular (2, dc)-LDPC codes over GF(q) using their binary images
In this paper, a method to design regular (2, dc)-LDPC codes over GF(q) with both good waterfall and error floor properties is presented, based on the algebraic properties of thei...
Charly Poulliat, Marc P. C. Fossorier, David Decle...
VTC
2010
IEEE
242views Communications» more  VTC 2010»
15 years 5 months ago
A Cross-Layer Design Based on Geographic Information for Cooperative Wireless Networks
—Most of geographic routing approaches in wireless ad hoc and sensor networks do not take into consideration the medium access control (MAC) and physical layers when designing a ...
Teck Aguilar, Mohamed Chedly Ghedira, Syue-Ju Syue...
TIM
2010
139views Education» more  TIM 2010»
15 years 1 months ago
A Design Approach For Digital Controllers Using Reconfigurable Network-Based Measurements
In this paper, the authors propose and analyze a network-based control architecture for power-electronicsbuilding-block-based converters. The objective of the proposed approach is ...
Rong Liu, Antonello Monti, Ferdinanda Ponci, Anton...
GECCO
2007
Springer
155views Optimization» more  GECCO 2007»
16 years 29 days ago
COSMO: a correlation sensitive mutation operator for multi-objective optimization
This contribution is the first to discover exploitable structural features within circuit optimization problems (COP) and discuss how it is indicative of a general structure and ...
Varun Aggarwal, Una-May O'Reilly
ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
16 years 3 months ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou