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ISCAS
2005
IEEE
115views Hardware» more  ISCAS 2005»
16 years 11 days ago
Power-aware slack distribution for hierarchical VLSI design
Abstract— Hierarchical design plays an important role in microprocessor and ASIC domains where design complexity limits design productivity and tool capacity. Slack distribution,...
Hyung-Ock Kim, Youngsoo Shin
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
16 years 2 days ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
DATE
2003
IEEE
75views Hardware» more  DATE 2003»
16 years 2 days ago
Circuit and Platform Design Challenges in Technologies beyond 90nm
There are already a huge number of problems for silicon designers and it is likely to just get worse. Many of these problems are technical associated with shrinking geometries and...
Bill Grundmann, Rajesh Galivanche, Sandip Kundu
ISCAS
2003
IEEE
79views Hardware» more  ISCAS 2003»
16 years 1 days ago
Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder
A new design of Psycho-Acoustic Model in MPEG-214 AAC encoding is proposed. Differing from the conventional PC-based and DSP-based encoders, it was based on hybrid architectures. ...
Tsung-Han Tsai, Shih-Way Huang, Liang-Gee Chen
ISCA
2000
IEEE
111views Hardware» more  ISCA 2000»
15 years 11 months ago
HLS: combining statistical and symbolic simulation to guide microprocessor designs
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...
Mark Oskin, Frederic T. Chong, Matthew K. Farrens