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ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
16 years 21 days ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor
PLDI
2003
ACM
15 years 12 months ago
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
This paper presents the design and implementation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage scaling (DVS). The algorithm ...
Chung-Hsing Hsu, Ulrich Kremer
ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
15 years 11 months ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
ASPDAC
2007
ACM
88views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Voltage Island Generation under Performance Requirement for SoC Designs
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
Wai-Kei Mak, Jr-Wei Chen
FPL
2006
Springer
113views Hardware» more  FPL 2006»
15 years 10 months ago
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...