8497 search results - page 1324 / 1700 » Design for an Optimal Probe |
179
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VIS
2007
IEEE
16 years 8 months ago
2007
IEEE
Hardware-accelerated volume rendering using the GPU is now the standard approach for real-time volume rendering, although limited graphics memory can present a problem when renderi...
181
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ICPR
2002
IEEE
16 years 8 months ago
2002
IEEE
One of the major difficulties in face recognition systems is the in-depth pose variation problem. Most face recognition approaches assume that the pose of the face is known. In th...
180
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DAC
1998
ACM
16 years 7 months ago
1998
ACM
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
230
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
176
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...