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DAC
2007
ACM
16 years 7 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
FPL
2004
Springer
144views Hardware» more  FPL 2004»
15 years 10 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna
BCSHCI
2007
15 years 7 months ago
Using formal models to design user interfaces: a case study
The use of formal models for user interface design can provide a number of benefits. It can help to ensure consistency across designs for multiple platforms, prove properties such...
Judy Bowen, Steve Reeves
CDVE
2005
Springer
144views Visualization» more  CDVE 2005»
15 years 11 months ago
The Construction Management Cooperated with Clients Using a Parametric Information Design Method
This paper presents a new construction management cooperated with clients using a parametric information design method for road construction. This management has been found to be e...
Koichi Aritomi, Ryosuke Shibasaki, Nobuyoshi Yabuk...
ICES
2003
Springer
151views Hardware» more  ICES 2003»
15 years 11 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...