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EUROSYS
2006
ACM
16 years 3 months ago
On the road to recovery: restoring data after disasters
—Restoring data operations after a disaster is a daunting task: how should recovery be performed to minimize data loss and application downtime? Administrators are under consider...
Kimberly Keeton, Dirk Beyer 0002, Ernesto Brau, Ar...
ICCAD
2008
IEEE
170views Hardware» more  ICCAD 2008»
16 years 3 months ago
A polynomial time approximation scheme for timing constrained minimum cost layer assignment
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
Shiyan Hu, Zhuo Li, Charles J. Alpert
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
16 years 3 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
16 years 3 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
ICCAD
2002
IEEE
161views Hardware» more  ICCAD 2002»
16 years 3 months ago
Non-tree routing for reliability and yield improvement
We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduc...
Andrew B. Kahng, Bao Liu, Ion I. Mandoiu
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