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DAC
1998
ACM
15 years 11 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
CAV
1998
Springer
175views Hardware» more  CAV 1998»
15 years 11 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
GD
1998
Springer
15 years 11 months ago
Drawing Large Graphs with H3Viewer and Site Manager
We demonstrate the H3Viewer graph drawing library, which can be run from a standalone program or in conjunction with other programs such as SGI's Site Manager application. Our...
Tamara Munzner
ICCAD
1997
IEEE
76views Hardware» more  ICCAD 1997»
15 years 11 months ago
Simulation methods for RF integrated circuits
Abstract — The principles employed in the development of modern RF simulators are introduced and the various techniques currently in use, or expected to be in use in the next few...
Kenneth S. Kundert
INFOCOM
1997
IEEE
15 years 11 months ago
A Near-Optimal Packet Scheduler for QoS Networks
A packet scheduler in a quality-of-service QoS network should be sophisticated enough to support stringent QoS constraints at high loads, but it must also have a simple implemen...
Dallas E. Wrege, Jörg Liebeherr
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